Binning, also called on-chip integration, is the combination of the charges of neighboring CCD pixels during readout. The result is an increased signal and thus an improved sensitivity and a better signal-to-noise ratio. This allows to reduce the exposure time and accordingly to minimize photodamage of the specimen. The reduced amount of data results in a improved frame rate during image acquisition, however, at the cost of loss in spatial resolution. The influence on resolution is further illustrated in the glossary under Pixel. The binning factor is adjustable and usually square (2x2, 4x4...) to avoid image distortion. It has to be pointed out that even if the amount of data is reduced by a factor of 4 in the case of 2x2 binning, for example, the chip readout time is only reduced by half. The reason is that only the parallel binning, that is, the superposition of neighboring rows in the serial shift register, is done on-chip while the serial binning is done after the data have been readout into the output node (summing well) before being passed on to the output amplifier and analog-to-digital converter. Thus, in case of 2x2 binning and a 1280x1024 pixel chip, only 512 instead of 1024 lines have to be readout, each with the full amount of 1280 individual charges.

Binning is achieved by the subsequent superposition of rows of data in the serial shift register (parallel binning) and the addition of charges from neighboring wells of the serial register to a superpixel (serial binning). The black-and-white images show how binning leads to enhanced brightness but reduced spatial resolution. In the contrast enhanced image the original gray values are linearly scaled from black to white so that weaker details are better visible.