Back-thinned, back-illuminated CCD chips
This is a rather expensive and delicate type of chips for high-end scientific-grade CCD, ICCD and EBCCD cameras which is, to put it simple, mounted upside-down in the camera. The illuminated back is thinned by etching down to about 10 - 15 microns so that it becomes transparent. These sensors have a substantially improved sensitivity over the entire spectral range as compared to standard CCD chips. The may exceed 80% between about 450 and 650 nm. A substantial downside of this chip type is a readout noise that is usually considerably higher than that of standard chips even at slow digitization speed. The dark noise can be higher in cases as well.

Full-frame CCD chips
Full-frame CCD chips consist of a high-density array of photodiodes that convert the incoming photons into electrical potentials. The fill factor is close to 100 percent, which means there is nearly no "empty space" between the diodes and no incoming photons are lost. After image exposure the data readout is performed by shifting the charges in a parallel fashion one row at a time to the serial register. (The charge transfer is similar to the readout of data from the storage array of a frame-transfer chip as depicted below.) The serial register then shifts each row of information sequentially to an output amplifier before it is directed to an A/D signal converter. Unless mechanical shutters or synchronized illumination is used for exposure, smearing artefacts occur because the photodiodes are being continuously illuminated during parallel register readout.

Frame-transfer CCD chips
Frame-transfer CCDs use two-part chips in which one half is exposed and collects photons while the other is used for temporary data storage only and masked to protect it from incoming light. During the exposure of an image, the data of the previous image are readout from the storage array via the serial shift register through an output amplifier and A/D converter. Once exposure and readout are completed the newly accumulated charges are very rapidly moved from the light sensitive half to the emptied storage array; this is termed the "frame transfer". Afterwards the cycle can be repeated and the next image acquired. A disadvantage of this principle is the possibility of charge smearing during the parallel transfer if the light influx is continuous throughout.

 

Schematic principle of the data readout
from a frame-transfer CCD chip

Interline-transfer CCD chips
On interline-transfer chips each column of individual photodiodes has a light-shielded (masked) vertical transfer shift register directly adjacent to it. The parallel photodiode registers and interline masks are separated by transfer gates. Similarly to frame-transfer CCDs, there are cycles of simultaneous photodiode exposure and charge transfer channel readout followed by very rapid interline charge transfer from the photodiodes to the emptied shift registers.
Interline-transfer chips are usually equipped with microlense arrays. There is a lens for every pixel to collect photons that would otherwise remain undetected by hitting the interline masks or transfer gates. These lenslet arrays increase the so-called photodiode fill factor by more then a factor of three.

These devices also include an "electron drain" to prevent electron overflow into neighbouring pixels by overexposure and the resulting blooming artefacts in the images. Furthermore, electronic shuttering is possible by switching the photodiodes voltage in order to prevent photoelectrons that are generated during off-times from reaching the transfer registers.

Schematic design and data transfer of an interline-transfer CCD chip

Electron Multiplying CCD (EMCCD) chips
This is a new on-chip gain technique that can be applied to all current chip types. Such chips feature an additional gain register inserted between shift register and output amplifier through which all electrons are moved serially upon data readout. In each charge, transfer step electron multiplication occurs upon impact ionization caused by electrodes with higher voltage amplitude than is necessary for the transfer alone. While the multiplication factor per step might be low, the huge number of steps during serial readout leads to a significant gain. For example, 0.5% gain per step leads to a 165-fold signal increase for 1024 pixels per line. Besides voltage and number of transfer steps, the gain factor is also dependent on the chip temperature. The lower the temperature, the more probable is the generation of secondary electrons.
The fundamental difference to intensified CCDs is that in those the photoelectrons are multiplied prior to reaching the CCD chip, while here the gain is achieved on-chip. Because it is done before readout the read noise is not affected and consequently the signal-to-noise ratio enhanced significantly. On the other hand, dark charges are multiplied together with the photoelectrons, however, the cooling of the CCD keeps this factor low. A certain additional noise factor arises from the probabilistic nature of the secondary electron generation and the uncertainty that goes along.

An advantage over intensified CCDs is that there is no risk of hardware damage due to overexposure and that the spatial resolution is the same as for an analogous standard CCD and not reduced by a photocathode or MCP.

Schematic principle of the data readout from
a frame-transfer EMCCD chip through a gain register